View PMWD15UN_1297060.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

PMWD15UN
Dual N-channel TrenchMOSTM ultra low level FET
Rev. 04 -- 5 April 2005 Product data sheet
1. Product profile
1.1 General description
Dual common drain N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOSTM technology.
1.2 Features
s Surface mounting package s Very low threshold voltage s Low profile s Fast switching
1.3 Applications
s Portable appliances s Battery management s PCMCIA cards s Load switching
1.4 Quick reference data
s VDS 20 V s Ptot 4.2 W s ID 11.6 A s RDSon 18.5 m
2. Pinning information
Table 1: Pin 1, 8 2, 3 4 5 6, 7 Pinning Description drain (D) source1 (S1) gate1 (G1) gate2 (G2) source2 (S2)
G1 S1 G2 S2
mbl600
Simplified outline
8 5
Symbol
D D
1
4
SOT530-1 (TSSOP8)
Philips Semiconductors
PMWD15UN
Dual N-channel TrenchMOSTM ultra low level FET
3. Ordering information
Table 2: Ordering information Package Name PMWD15UN TSSOP8 Description plastic thin shrink small outline package; 8 leads; body width 4.4 mm Version SOT530-1 Type number
4. Limiting values
Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS ID IDM Ptot Tstg Tj IS ISM
[1]
Conditions 25 C Tj 150 C 25 C Tj 150 C; RGS = 20 k Tsp = 25 C; VGS = 4.5 V; Figure 2 and 3 Tsp = 100 C; VGS = 4.5 V; Figure 2 Tsp = 25 C; pulsed; tp 10 s; Figure 3 Tsp = 25 C; Figure 1
[1] [1] [1] [1]
Min -55 -55
[1] [1]
Max 20 20 12 11.6 7.3 46.4 4.2 +150 +150 3.5 14
Unit V V V A A A W C C A A
drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage drain current (DC) peak drain current total power dissipation storage temperature junction temperature
Source-drain diode source (diode forward) current (DC) Tsp = 25 C peak source (diode forward) current Tsp = 25 C; pulsed; tp 10 s
Single device conducting.
-
9397 750 14713
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 -- 5 April 2005
2 of 12
Philips Semiconductors
PMWD15UN
Dual N-channel TrenchMOSTM ultra low level FET
120 Pder (%) 80
03aa17
120 Ider (%) 80
03aa25
40
40
0 0 50 100 150 Tsp (C) 200
0 0 50 100 150 Tsp (C) 200
P tot P der = ------------------------ x 100 % P
tot ( 25 C )
VGS 4.5 V
ID I der = -------------------- x 100 % I
D ( 25 C )
Fig 1. Normalized total power dissipation as a function of solder point temperature
102 ID (A) 10 Limit RDSon = VDS / ID
Fig 2. Normalized continuous drain current as a function of solder point temperature
003aaa250
tp = 100 s 1 ms 10 ms 100 ms 1s
1
DC
10-1
10-2 10-1
1
10 VDS (V)
102
Tsp = 25 C; IDM is single pulse
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
9397 750 14713
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 -- 5 April 2005
3 of 12
Philips Semiconductors
PMWD15UN
Dual N-channel TrenchMOSTM ultra low level FET
5. Thermal characteristics
Table 4: Rth(j-sp) Rth(j-a) Thermal characteristics Conditions Figure 4 mounted on a printed-circuit board; minimum footprint; vertical in still air Min Typ 100 Max 30 Unit K/W K/W thermal resistance from junction to solder point thermal resistance from junction to ambient Symbol Parameter
102 Zth(j-sp) (K/W) = 0.5 10 0.2 0.1 0.05 1 0.02 single pulse
tp P
003aaa251
=
tp T
t T
10
-1
10-4
10-3
10-2
10-1
1
10
tp (s)
102
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration
9397 750 14713
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 -- 5 April 2005
4 of 12
Philips Semiconductors
PMWD15UN
Dual N-channel TrenchMOSTM ultra low level FET
6. Characteristics
Table 5: Characteristics Tj = 25 C unless otherwise specified. Symbol V(BR)DSS Parameter drain-source breakdown voltage Conditions ID = 250 A; VGS = 0 V Tj = 25 C Tj = -55 C VGS(th) IDSS gate-source threshold voltage drain-source leakage current ID = 1 mA; VDS = VGS; Figure 9 and 10 VDS = 20 V; VGS = 0 V Tj = 25 C Tj = 150 C IGSS RDSon gate-source leakage current drain-source on-state resistance VGS = 10 V; VDS = 0 V VGS = 4.5 V; ID = 5 A; Figure 7and 8 Tj = 25 C Tj = 150 C VGS = 1.8 V; ID = 4.5 A; Figure 7 and 8 VGS = 2.5 V; ID = 5 A; Figure 7 and 8 Dynamic characteristics Qg(tot) Qgs Qgd Ciss Coss Crss td(on) tr td(off) tf VSD trr Qr total gate charge gate-source charge gate-drain (Miller) charge input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time source-drain (diode forward) voltage IS = 5 A; VGS = 0 V; Figure 12 reverse recovery time recovered charge IS = 5 A; dIS/dt = -100 A/s; VGS = 0 V; VR = 20 V VDS = 10 V; RL = 10 ; VGS = 4.5 V; RG = 6 VGS = 0 V; VDS = 16 V; f = 1 MHz; Figure 11 ID = 4 A; VDS = 16 V; VGS = 4.5 V; Figure 13 22.2 2.1 6.2 280 190 14.7 22.4 57 33 0.67 45 12.3 1.2 nC nC nC pF pF pF ns ns ns ns V ns nC 15.3 26 20 17 18.5 31 28.5 20.5 m m m m 1 100 100 A A nA 20 18 0.45 0.7 V V V Min Typ Max Unit Static characteristics
1450 -
Source-drain diode
9397 750 14713
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 -- 5 April 2005
5 of 12
Philips Semiconductors
PMWD15UN
Dual N-channel TrenchMOSTM ultra low level FET
12 ID (A)
003aaa252
4.5 1.8 1.5
12 ID (A) VDS > ID x RDSon
003aaa253
VGS (V) = 1.35 8 1.3 8 Tj = 150 C 25 C 4 1.2 4
1.1 0 0 0.2 0.4 0.6 0.8 VDS (V) 1 0 0 0.5 1 1.5 VGS (V) 2
Tj = 25 C
Tj = 25 C and 150 C; VDS > ID x RDSon
Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values
003aaa254
Fig 6. Transfer characteristics: drain current as a function of gate-source voltage; typical values
2 a 1.5
03aa27
100 1.1 RDSon (m) 75 1.2 1.3
50
1
25
VGS (V) = 1.8
0.5
2.5 0 0 4 8
4.5 ID (A) 12
0 -60
0
60
120
Tj (C)
180
Tj = 25 C
R DSon a = ----------------------------R DSon ( 25 C ) Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature
Fig 7. Drain-source on-state resistance as a function of drain current; typical values
9397 750 14713
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 -- 5 April 2005
6 of 12
Philips Semiconductors
PMWD15UN
Dual N-channel TrenchMOSTM ultra low level FET
1.2 VGS(th)
03aj65
10-3 ID (A)
03aj64
(V)
0.9 max
10-4 typ 0.6 min 0.3 10-5 min typ max
0 -60
10-6 0 60 120 Tj (C) 180 0 0.2 0.4 0.6 0.8 1 VGS (V)
ID = 1 mA; VDS = VGS
Tj = 25 C; VDS = 5 V
Fig 9. Gate-source threshold voltage as a function of junction temperature
104 C (pF) Ciss 103
003aaa255
Fig 10. Sub-threshold drain current as a function of gate-source voltage
12 IS (A) 8 150 C
003aaa256
Coss Crss 102 4 Tj = 25 C
10 10-1
1
10
VDS (V)
102
0 0 0.2 0.4 0.6 0.8 VSD (V) 1
VGS = 0 V; f = 1 MHz
Tj = 25 C and 150 C; VGS = 0 V
Fig 11. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values
Fig 12. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values
9397 750 14713
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 -- 5 April 2005
7 of 12
Philips Semiconductors
PMWD15UN
Dual N-channel TrenchMOSTM ultra low level FET
5 VGS (V) 4
003aaa257
3
2
1
0 0 5 10 15 20 25 QG (nC)
ID = 4 A; VDD = 16 V
Fig 13. Gate-source voltage as a function of gate charge; typical values
9397 750 14713
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 -- 5 April 2005
8 of 12
Philips Semiconductors
PMWD15UN
Dual N-channel TrenchMOSTM ultra low level FET
7. Package outline
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 4.4 mm SOT530-1
E D
A X
c y HE Z vMA
8
5
A2 A1 pin 1 index Lp L detail X
(A3)
A
1
e bp
4
wM
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.05 A2 0.95 0.85 A3 0.25 bp 0.30 0.19 c 0.20 0.13 D(1) 3.1 2.9 E(2) 4.5 4.3 e 0.65 HE 6.5 6.3 L 0.94 Lp 0.7 0.5 v 0.1 w 0.1 y 0.1 Z(1) 0.70 0.35 8 0
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT530-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 00-02-24 03-02-18
Fig 14. Package outline SOT530-1 (TSSOP8)
9397 750 14713 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 -- 5 April 2005
9 of 12
Philips Semiconductors
PMWD15UN
Dual N-channel TrenchMOSTM ultra low level FET
8. Revision history
Table 6: Revision history Release date 20050405 Data sheet status Product data sheet Change notice Doc. number 9397 750 14713 Supersedes PMWD15UN-03 Document ID PMWD15UN_4 Modifications:
* * * * * *
The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors. ID and Ptot data revised in Section 1.4 "Quick reference data". ID, IDM, Ptot, IS and ISM data revised in Table 3 "Limiting values". Figure 3 revised in Section 4 "Limiting values". Rth(j-sp) data revised in Table 4 "Thermal characteristics". Figure 4 revised in Section 5 "Thermal characteristics". Product data Product data Product data 9397 750 12677 9397 750 11777 9397 750 10829 PMWD15UN-02 PMWD15UN-01 -
PMWD15UN-03 PMWD15UN-02 PMWD15UN-01
20040220 20030807 20030204
9397 750 14713
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 -- 5 April 2005
10 of 12
Philips Semiconductors
PMWD15UN
Dual N-channel TrenchMOSTM ultra low level FET
9. Data sheet status
Level I II Data sheet status [1] Objective data Preliminary data Product status [2] [3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
III
Product data
Production
[1] [2] [3]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
10. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
12. Trademarks
TrenchMOS -- is a trademark of Koninklijke Philips Electronics N.V.
11. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors
13. Contact information
For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
9397 750 14713
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 -- 5 April 2005
11 of 12
Philips Semiconductors
PMWD15UN
Dual N-channel TrenchMOSTM ultra low level FET
14. Contents
1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 11 12 13 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Contact information . . . . . . . . . . . . . . . . . . . . 11
(c) Koninklijke Philips Electronics N.V. 2005
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 5 April 2005 Document number: 9397 750 14713
Published in The Netherlands

▲Up To Search▲

Price & Availability of PMWD15UN

	To Download PMWD15UN Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .